1. Technical Field of the Invention
The present invention relates to a method for producing a field effect transistor of the metal oxide semiconductor (MOS) type.
2. Description of Related Art
European Patent Application EP 1,091,417 (the disclosure of which is incorporated by reference), describes a configuration of GAA (Gate All Around) MOS transistor. Such a configuration allows the conduction state of the transistor to be well controlled thanks to better distribution of the electric field generated by the gate in the channel.
However, conduction control of a transistor having this configuration is limited by undesirable interactions between the substrate that carries the transistor and certain parts of the channel. These interactions, of electrostatic or electromagnetic type, may behave in a manner equivalent to that of parasitic transistors. This is because charges and electrical currents induced in the substrate near the channel in an uncontrolled manner are liable to have an effect on the conduction of the transistor, independently of a control signal applied to the gate of the transistor.
Moreover, such a gate all around transistor is produced using three lithography masks in succession. The first mask defines the active region of a transistor, within an electrically insulated circumference. The second mask defines a silicon portion corresponding to the source region, to the channel and to the drain region. The third mask defines the gate. The combination of these three masks with the usual design rules for producing integrated components results in a relatively large size of the transistor obtained.
A need exists for a method for producing a transistor with improved conduction control and having a size compatible with a high degree of integration.